Recently, light emitting diodes (LED) have come to be widely used in a variety of fields, for example, display devices, optical disk apparatuses, and the like, because of their low power requirements and long life. The light emitting diode emits light by supplying an electrical current to the light emitting diode.
The light emitting diode for the display device is generally driven by a constant current circuit to reduce variation in brightness. To adjust the brightness to a specific use, a setting condition for the current of the constant current circuit is generally adjusted. However, a voltage drop at the light emitting diode changes in accordance with the current of the light emitting diode, and accordingly, voltage at a terminal of an output transistor changes dramatically. The terminal of an output transistor is configured to be an output terminal of the constant current circuit, and generally a drain electrode of a MOS transistor is used as the output terminal of the constant current circuit. When the voltage of the output terminal changes by a large amount, the brightness of the light emitting diode varies because the output current changes due to a channel length modulation effect of the MOS transistor.
To solve such a problem, a constant current circuit shown in FIG. 1 has been proposed. The constant current circuit includes an error amplifier OP102, an NMOS transistor M116, PMOS transistors M114 and M115, a resistor R111, NMOS transistors M111, M112, M141, and M142, and a reference voltage generator 107, and a bias voltage generator 108. In FIG. 1, NMOS transistors M111, M112, M141, and M142 form a current mirror circuit so that an output current iout (mirror current) is output to an external load 110 connected to an output terminal OUT. The output current is obtained by multiplying a current iref1 by a ratio determined by a ratio of transistor sizes of the NMOS transistors M111 and M112. The error amplifier OP102 controls the NMOS transistor M116 so that a voltage at a connection node of the resistor R111 and the NMOS transistor M116 becomes equal to a reference voltage Vref. A current iref2 flowing through the resistor R111 is expressed by a formula, iref2=Vref/r111, where a resistance of the resistor R111 is r111. The current iref2 becomes the current iref1 as shown in FIG. 1 because of a current reflection effect created by a current mirror circuit which comprises the PMOS transistors M114 and M115.
An output circuit comprised of the NMOS transistor M111, M112, M141, and M142 forms a cascode-current-mirror circuit. A drain voltage of the NMOS transistor M112 is always equal to a drain voltage of the NMOS transistor M111 and independent of a voltage at the output terminal OUT. Accordingly, the output current iout may not be affected by voltage fluctuation at the output terminal OUT. However, since an output transistor is that is a two transistors by connecting the NMOS transistors M112 and M142 in series, a large output voltage is required for the output transistor to work in a saturation operation region in which a desired constant current is output even if the output circuit is formed of a low-voltage-cascade-current-mirror circuit.
A drain-source voltage Vds1 of the NMOS transistor M112 between a drain and a source of the NMOS transistor M112 is expressed by a formula (a):Vds1=Vbias−Vgs2  (a),where, for example, the NMOS transistors M111, M112, M141, and M142 have an equal transistor size and an equal conductivity, each threshold voltage of the transistors is Vthn, a gate-source voltage of the NMOS transistor M142 is Vgs2, a bias voltage generated by the bias voltage generator 108 is Vbias, and an overdrive voltage is Vov.
When the bias voltage Vbias is set to be a formula Vbias=Vgs2+Vov so that the NMOS transistor M112 works at a boundary operation region between the saturation and linear operation regions, the formula (a) becomes a formula (b):Vds1=Vov  (b)
When the NMOS transistor M142 also works at a boundary operation region between the saturation and linear operation regions, a drain-source voltage Vds2 of the NMOS transistor M142 between drain and source of the NMOS transistor M142 is expressed by a formula (c):Vds2=Vov  (c)
Therefore, a minimum output voltage Vomin at the output terminal OUT is expressed by a formula (d):Vomin=Vds1+Vds2=2×Vov  (d)
In common CMOS processes, the minimum voltage Vomin is 0.6 v to 1.0 v. When the output voltage at the output terminal OUT increases, power consumption by the output transistor of the constant current circuit also increases.
An output transistor having a large size is generally employed to output a large current to drive the light emitting device. Accordingly, a chip size increases and causes a cost penalty, especially when the output transistor is formed of two transistors by connecting the NMOS transistors M112 and M142 in series. Further, the drain-source voltage of the NMOS transistor M142 changes in accordance with the output voltage at the output terminal OUT. Meanwhile, the drain-source voltage of the NMOS transistor M141 becomes (Vthn+Vov)−Vov=Vthn. Because the drain-source voltages of the NMOS transistors M141 and M142 differ from each other, the gate-source voltages differ from each other. Consequently, the drain-source voltages of the NMOS transistors M111 and M112 differ from each other. Thus, a systematic error occurs in the output current iout.
To solve the problem described above, another constant current circuit 290 shown in FIG. 2 is proposed. The constant current circuit 290 includes a current source I, an output circuit 200, a level shifter, and a variable resistor R. The output circuit 200 includes NMOS transistors NT1 and NT2. In the constant current circuit 290 shown in FIG. 2, an output current is kept constant even if an external load connected to an output terminal is changed. Further, an output transistor works in the saturation operation region even at a low output voltage at the output terminal OUT. In the constant current circuit shown in FIG. 2, if a variable resistor R is properly adjusted, a systematic error can be avoided without using a cascode-current-mirror circuit, and a constant current can be supplied accurately because the drain-source voltages of the NMOS transistors NT1 and NT2 are equal.
However, a drain voltage of the NMOS transistor NT1 is adjusted only in a voltage range from a voltage at which the NMOS transistor NT2 works in the saturation operation region to a gate-source voltage of the NMOS transistor NT2. An overdrive voltage Vo2 is expressed by a formula, Vov2≦Vo≦Vthn+Vov2, where the threshold voltage of the NMOS transistor NT2 is Vthn. In other words, the voltage range of the output voltage Vo at the output terminal OUT for supplying a constant current without a systematic error is very narrow.